.ifndef custom_i .define custom_i ; ; created by goldmomo (2025) ; ; only defined what I currently need ; ; page 0 icl "zeroPage.i" .define POKMSK $0010 ; page 2 .define VDSLSTL $0200 .define VDSLSTH $0201 .define VVBLKIL $0222 .define VVBLKIH $0223 ;vbl immediate .define VVBLKDL $0224 .define VVBLKDH $0225 ;vbl deferred .define SDLSTL $0230 .define SDLSTH $0231 .define VSERINL $020A .define VSERINH $020B .define VTIMR1L $0210 .define VTIMR1H $0211 .define VTIMR2L $0212 .define VTIMR2H $0213 .define VTIMR4L $0214 .define VTIMR4H $0215 .define VIMIRQL $0216 .define VIMIRQH $0217 .define COLOR0 $02C4 ;shadow colors .define COLOR1 $02C5 .define COLOR2 $02C6 .define COLOR3 $02C7 ; === ANTIC === ; DMACTL $D400 Display DMA Control ; ------------------------------------------------------------------------------ ; Bit | Dez | Hex | Function | Default ; ----+-----+------+----------------------------------------------------+--------- ; 7 | 128 | $80 | not used | 0 ; 6 | 64 | $40 | not used | 0 ; 5 | 32 | $20 | (display list) DMA enable | 1 ; 4 | 16 | $10 | single line P/M vertical resolutin (not two lines) | 0 ; 3 | 8 | $08 | player DMA enable | 0 ; 2 | 4 | $04 | missiles DMA enable | 0 ; 0,1 | 3 | $03 | playfiled width wide (48) | ; 0,1 | 2 | $02 | playfiled width normal (40) | 10 ; 0,1 | 1 | $01 | playfiled width narrow (32) | ; 0,1 | 0 | $00 | playfiled width off | ; .define DMACTL $D400 .define DMACTL_DL $20 .define DMACTL_X1_PM $10 .define DMACTL_PLAYER $08 .define DMACTL_MISSILE $04 .define DMACTL_PF_WIDE $03 .define DMACTL_PF_NORMAL $02 .define DMACTL_PF_NARROW $01 .define DMACTL_PF_OFF $00 ; CHACTL $D401 ; Character Control (Zeichensatzsteuerung) ; This register controls the display of characters that have bit 7 set (inverted characters by default). ; ------------------------------------------------------------------------------ ; Bit | Dez | Hex | Function | Default ; ----+-----+------+----------------------------------------------------+--------- ; 7 | 128 | $80 | not used | 0 ; 6 | 64 | $40 | not used | 0 ; 5 | 32 | $20 | not used | 0 ; 4 | 16 | $10 | not used | 0 ; 3 | 8 | $08 | not used | 0 ; 2 | 4 | $04 | Upside- Down | 0 ; 1 | 2 | $02 | Inverse Video | 0 ; 0 | 1 | $01 | Opaque | 0 .define CHACTL $D401 ;Display list Pointer (display list can not coress a 1k page (align $400!) .define DLISTL $D402 ; Display List Pointer (low byte) .define DLISTH $D403 ; Display List Pointer (high byte) ; HSCROL $D404 ; Number of color clocks to scroll a mode line horizontally. ; ------------------------------------------------------------------------------ ; Bit | Dez | Hex | Function | Default ; ----+-----+------+----------------------------------------------------+--------- ; 7 | 128 | $80 | not used | 0 ; 6 | 64 | $40 | not used | 0 ; 5 | 32 | $20 | not used | 0 ; 4 | 16 | $10 | not used | 0 ; 3-0| | | hscroll (mode related) | 0 .define HSCROL $D404 .define VCOUNT $D40B .define VSCROL $D405 .define PMBASE $D407 ; player/missile address (high) .define WSYNC $D40A .define CHBASE $D409 ;character base ; NMIEN $D40E ; NMI Enable (VBI, DLI) ; ------------------------------------------------------------------------------ ; Bit | Dez | Hex | Function | Default ; ----+-----+------+----------------------------------------------------+--------- ; 7 | 128 | $80 | DLI (Display List INTERRUPT) enable | 0 ; 6 | 64 | $40 | VBI (Vertical Blank INTERRUPT) enable | 0 ; 5 | 32 | $20 | SYSTEM RESET enable | 0 ; 4 | 16 | $10 | not used | 0 ; 3 | 8 | $08 | not used | 0 ; 2 | 4 | $04 | not used | 0 ; 1 | 2 | $02 | not used | 0 ; 0 | 1 | $01 | not used | 0 .define NMIEN $D40E .define NMIEN_DLI $80 .define NMIEN_VBI $40 .define NMIEN_SYS_RESET $20 .define NMIRES $D40F ; NMI Reset Flag ; === GTIA === ; HPOSP0-HPOSP3 (W) control the position of the left edge of each of the four players, in color clocks. More ; precisely, they set the trigger point at which the shift register is loaded and begins shifting player graphics ; data through the collision and priority logic to the video output. ; A position of $80 corresponds to the center of the playfield. The narrow playfield runs from $40-$BF, the ; normal playfield from $30-$CF, and the wide playfield from $22-$DD. .define HPOSP0 $D000 ;at write .define HPOSP1 $D001 .define HPOSP2 $D002 .define HPOSP3 $D003 ; M0PF-M3PF (R) A bit is set in the M0PF, M1PF, M2PF, and M3PF registers whenever missiles 0-3 overlap a playfield in the ; visible region, but bit 0 being set for a collision with playfield 0. Overlaps in the horizontal or vertical blank ; region are not detected. Collisions are latched and stay flagged until HITCLR is written. ; No playfield collisions are detected in GTIA modes 9 or 11. Playfield collisions are triggered normally for GTIA ; mode 10. ; In high-resolution modes (ANTIC modes 2, 3, and F), the monochrome playfield is considered to be PF2. ; Either of the two pixels being set in the pair displayed during a color clock will signal a PF2 collision on that ; clock .define M0PF $D000 ;at read .define M0PF_PF0 $01 .define M0PF_PF1 $02 .define M0PF_PF2 $04 .define M0PF_PF3 $08 .define M1PF $D001 .define M1PF_PF0 $01 .define M1PF_PF1 $02 .define M1PF_PF2 $04 .define M1PF_PF3 $08 .define M2PF $D002 .define M2PF_PF0 $01 .define M2PF_PF1 $02 .define M2PF_PF2 $04 .define M2PF_PF3 $08 .define M3PF $D003 .define M3PF_PF0 $01 .define M3PF_PF1 $02 .define M3PF_PF2 $04 .define M3PF_PF3 $08 ; HPOSM0-HPOSM3 (W) control the position of the left edge of each of the four missiles, in color clocks. More ; precisely, they set the trigger point at which the shift register is loaded and begins shifting missile graphics ; data through the collision and priority logic to the video output. ; A position of $80 corresponds to the center of the playfield. The narrow playfield runs from $40-$BF, the ; normal playfield from $30-$CF, and the wide playfield from $22-$DD. .define HPOSM0 $D004 ;at write .define HPOSM1 $D005 .define HPOSM2 $D006 .define HPOSM3 $D007 ; P0PF-P3PF (R) A bit is set in the P0PF, P1PF, P2PF, and P3PF registers whenever players 0-3 overlap a playfield in the ; visible region, but bit 0 being set for a collision with playfield 0. Overlaps in the horizontal or vertical blank ; region are not detected. Collisions are latched and stay flagged until HITCLR is written. ; No playfield collisions are detected in GTIA modes 9 or 11. Playfield collisions are triggered normally for GTIA ; mode 10. ; In high-resolution modes (ANTIC modes 2, 3, and F), the monochrome playfield is considered to be PF2. ; Either of the two pixels being set in the pair displayed during a color clock will signal a PF2 collision on that ; clock .define P0PF $D004 ;at read .define P0PF_PF0 $01 .define P0PF_PF1 $02 .define P0PF_PF2 $04 .define P0PF_PF3 $08 .define P1PF $D005 .define P1PF_PF0 $01 .define P1PF_PF1 $02 .define P1PF_PF2 $04 .define P1PF_PF3 $08 .define P2PF $D006 .define P2PF_PF0 $01 .define P2PF_PF1 $02 .define P2PF_PF2 $04 .define P2PF_PF3 $08 .define P3PF $D007 .define P3PF_PF0 $01 .define P3PF_PF1 $02 .define P3PF_PF2 $04 .define P3PF_PF3 $08 ; SIZEP0-SIZEP3 (W) control the horizontal width of each player by specifying how many color clocks to display ; each bit on screen. Since the horizontal position registers control the left side of each player, increasing the ; width causes players to expand to the right. ; A change to SIZEPx while the corresponding player is being shifted out will take place immediately. .define SIZEP0 $D008 ;at write player 0 size (1x, 2x, 4x) .define SIZEP0_NORMAL $0 .define SIZEP0_DOUBLE $1 .define SIZEP0_NORMAL2 $2 .define SIZEP0_QUADRUPLE $3 .define SIZEP1 $D009 .define SIZEP1_NORMAL $0 .define SIZEP1_DOUBLE $1 .define SIZEP1_NORMAL2 $2 .define SIZEP1_QUADRUPLE $3 .define SIZEP2 $D00A .define SIZEP2_NORMAL $0 .define SIZEP2_DOUBLE $1 .define SIZEP2_NORMAL2 $2 .define SIZEP2_QUADRUPLE $3 .define SIZEP3 $D00B .define SIZEP3_NORMAL $0 .define SIZEP3_DOUBLE $1 .define SIZEP3_NORMAL2 $2 .define SIZEP3_QUADRUPLE $3 ; M0PL-M3PL (R) A bit is set in the M0PL, M1PL, M2PL, and M3PL registers whenever missiles 0-3 overlap a player in the ; visible region, but bit 0 being set for a collision with player 0. Overlaps in the horizontal or vertical blank ; region are not detected. Collisions are latched and stay flagged until HITCLR is written .define M0PL $D008 ;at read .define M0PL_PF0 $01 .define M0PL_PF1 $02 .define M0PL_PF2 $04 .define M0PL_PF3 $08 .define M1PL $D009 ;at read .define M1PL_PF0 $01 .define M1PL_PF1 $02 .define M1PL_PF2 $04 .define M1PL_PF3 $08 .define M2PL $D00A ;at read .define M2PL_PF0 $01 .define M2PL_PF1 $02 .define M2PL_PF2 $04 .define M2PL_PF3 $08 .define M3PL $D00B ;at read .define M3PL_PF0 $01 .define M3PL_PF1 $02 .define M3PL_PF2 $04 .define M3PL_PF3 $08 ; SIZEM (W) control the horizontal width of each missile by specifying how many color clocks to display ; each bit on screen. Since the horizontal position registers control the left side of each missile, increasing the ; width causes missiles to expand to the right. ; A change to SIZEM while the corresponding missile is being shifted out will take place immediately. .define SIZEM $D00C ;at write (missile size) .define SIZEM0_NORMAL %00000000 .define SIZEM0_DOUBLE %00000001 .define SIZEM0_NORMAL2 %00000010 .define SIZEM0_QUADRUPLE %00000011 .define SIZEM1_NORMAL %00000000 .define SIZEM1_DOUBLE %00000100 .define SIZEM1_NORMAL2 %00001000 .define SIZEM1_QUADRUPLE %00001100 .define SIZEM2_NORMAL %00000000 .define SIZEM2_DOUBLE %00010000 .define SIZEM2_NORMAL2 %00100000 .define SIZEM2_QUADRUPLE %00110000 .define SIZEM3_NORMAL %00000000 .define SIZEM3_DOUBLE %01000000 .define SIZEM3_NORMAL2 %10000000 .define SIZEM3_QUADRUPLE %11000000 ;P0PL-P3PL (R) A bit is set in the P0PL, P1PL, P2PL, and P3PL registers whenever two players overlap in the visible region, ; with bit 0 being set for a collision with player 0. Overlaps in the horizontal or vertical blank region are not ; detected. Collisions are latched and stay flagged until HITCLR is written. ; A player never collides with itself and the corresponding collision bit is always 0 .define P0PL $D00C ;at read .define P0PL_PF0 $01 .define P0PL_PF1 $02 .define P0PL_PF2 $04 .define P0PL_PF3 $08 .define P1PL $D00D ;at read .define P1PL_PF0 $01 .define P1PL_PF1 $02 .define P1PL_PF2 $04 .define P1PL_PF3 $08 .define P2PL $D00E ;at read .define P2PL_PF0 $01 .define P2PL_PF1 $02 .define P2PL_PF2 $04 .define P2PL_PF3 $08 .define P3PL $D00F ;at read .define P3PL_PF0 $01 .define P3PL_PF1 $02 .define P3PL_PF2 $04 .define P3PL_PF3 $08 ; GRAFP0-GRAFP3 (W) hold the graphics data that is loaded into the shift register when each player is triggered ; by horizontal position. Normally player DMA is enabled on ANTIC when player graphics are used, which ; causes GRAFP0-GRAFP3 to be loaded automatically at the start of each scan line. When disabled, GTIA ; uses whatever data is in the internal latches. The latches can then be updated under CPU control, or simply ; left alone to display the same data on every scan line. ; Data is displayed MSB to LSB, with the most significant bit being displayed on the left. .define GRAFP0 $D00D ;write only, gfx player 0 (no PMG DMA) .define GRAFP1 $D00E .define GRAFP2 $D00F .define GRAFP3 $D010 ; TRIG0-3 (R) reflect the state of the four joystick trigger inputs. ; On the XL line, only two joystick ports are present and TRIG2 always reads as 1. TRIG3 is re-purposed as ; the cartridge detect line, reading 1 if cartridge ROM is mapped to $A000-BFFF and 0 otherwise .define TRIG0 $D010 ;read only .define TRIG0_ACTIVE $0 .define TRIG0_NOT_ACTIVE $1 .define TRIG1 $D011 ;read only .define TRIG1_ACTIVE $0 .define TRIG1_NOT_ACTIVE $1 .define TRIG2 $D012 ;read only .define TRIG2_ACTIVE $0 .define TRIG2_NOT_ACTIVE $1 .define TRIG3 $D013 ;read only .define TRIG3_ACTIVE $0 .define TRIG3_NOT_ACTIVE $1 ; GRAFM (W) holds the graphics data that is loaded into the shift register when each missile is triggered by ; horizontal position. Normally missile DMA is enabled on ANTIC when missile graphics are used, which ; causes GRAFM to be loaded automatically at the start of each scan line. When disabled, GTIA uses ; whatever data is in the internal latch. The latch can then be updated under CPU control, or simply left alone ; to display the same data on every scan line. ; Data is displayed MSB to LSB, with the most significant bit being displayed on the left .define GRAFM $D011 ;write only gfx missiles ; COLPM0-3 (W) These registers control the base colors used for players 0-3. ; 7..4 Hue 3..1 Luminance 0 is ignored .define COLPM0 $D012 ;write only, color player 0 .define COLPM1 $D013 .define COLPM2 $D014 .define COLPM3 $D015 ; The PAL (R) register indicates whether the GTIA is either the NTSC or PAL model. ; Note that while the entire value read from the PAL register appears to be stable and consistent, only bits 1-3 ; are guaranteed to be set to a particular value according to the original specification. .define PAL $D014 ;read only .define PAL_PAL $1 .define PAL_NTSC $f ; COLPF0-3 (W) These registers control the base colors used for playfields 0-3. ; In ANTIC modes 2, 3, and F, COLPF2 controls the color of the playfield. A 1 bit in the graphics data replaces ; the luminance of a pixel with that from COLPF1 ; 7..4 Hue 3..1 Luminance 0 is ignored .define COLPF0 $D016 ;write only, color playfield 0 .define COLPF1 $D017 .define COLPF2 $D018 .define COLPF3 $D019 ; COLBK (W) This register controls the color of the background, including the horizontal and vertical blank regions .define COLBK $D01A ;write only, color bg ; PRIOR (W)controls a bunch of miscellaneous options, including player/missile priority relative to playfields. All of ; these options have complex interactions with the rest of the video display logic. See the CTIA/GTIA chapter ; for details. ; ; 76 5 4 3210 ; GTIA-------- ; ----MC------ ; ------P5---- ; --------PRIO ; .define PRIOR $D01B ;write only .define PRIOR_GTIA_NORMAL $00 ;normal mode .define PRIOR_GTIA_1C_16LUM $40 ;1 color / 16 luma mode .define PRIOR_GTIA_9C $80 ;9 color mode .define PRIOR_GTIA_16C_1LUM $c0 ;16 colors / 1 luma mode .define PRIOR_MC_NORMAL $00 ;normal .define PRIOR_MC_MULTICOLOR $20 ;multicolor players enable .define PRIOR_P5_NORMAL $00 ;missiles use player 0-3 colors .define PRIOR_P5_PF3C $10 ;missiles use playfield 3 color .define PRIOR_PRIOM_PF0_PF1_P0_P1_P2_P3_PF2_PF3_BAK $8 .define PRIOR_PRIOM_PF0_PF1_PF2_PF3_P0_P1_P2_P3_BAK $4 .define PRIOR_PRIOM_P0_P1_PF0_PF1_PF2_PF3_P2_P3_BAK $2 .define PRIOR_PRIOM_P0_P1_P2_P3_PF0_PF1_PF2_PF3_BAK $1 ; VDELAY (W) is used to vertically scroll players and missiles down by one scan line in two-line resolution mode. ; Contrary to its name, however, it doesn't actually delay anything. What it does is control whether GTIA loads ; the graphics latches from the data during DMA time on even scan lines. When a bit is set in VDELAY, the ; corresponding sprite only loads data on odd scan lines, which effectively moves the sprite down a scan line ; when two-line DMA mode is enabled. In single line mode, this has the effect of halving sprite resolution. ; VDELAY has no effect on direct writes to the GRAFP0-3 or GRAFM registers ; ; 7 6 5 4 3 2 1 0 ; P3 P2 P1 P0 M3 M2 M1 M0 ; ; P3-M0 Vertical delay ; 0 Accept DMA data every scan line ; 1 Accept DMA data only on odd scan line ; .define VDELAY $D01C ;write only ; GRACTL $D01D ; controls PM and Triggers ; ------------------------------------------------------------------------------ ; Bit | Dez | Hex | Function | Default ; ----+-----+------+----------------------------------------------------+--------- ; 7 | 128 | $80 | not used | 0 ; 6 | 64 | $40 | not used | 0 ; 5 | 32 | $20 | not used | 0 ; 4 | 16 | $10 | not used | 0 ; 3 | 8 | $08 | not used | 0 ; 2 | 4 | $04 | Latch Triggers when 1 | 0 ; 1 | 2 | $02 | Turn on players when 1 | 0 ; 0 | 1 | $01 | Turn on missiles when 1 | 0 ; ; GTIA Modes ; This register can be used to select one of GTIA GRAPHICS modes 9, 10 and 11. ; GTIA Mode* Bit 6 Bit 7 Description ; 9 0 1 16 different luminances of the same hue (color) ; 10 1 0 9 different colors ; 11 1 1 16 different hues (colors) of the same luminance .define GRACTL $D01D ; Grafic Control (PMG activate) .define GRACTL_LT $4 .define GRACTL_PLAYERS $2 .define GRACTL_MISSILES $1 ; A write to HITCLR clears all of the collision registers. .define HITCLR $D01E ; CONSOL reads and writes the state of four bidirectional switch lines connected to GTIA. On the Atari, these ; are connected to the internal loudspeaker and the OPTION, SELECT, and START keys. Writing a 0 into a bit ; causes the corresponding switch line to be pulled up to +5V, and writing a 1 sinks it to ground. ; By default, the OS writes $08 into CONSOL during vertical blank.85 This causes the CONSOL register to read ; $07 when no keys are pressed, with bits 0-2 going low when one of the console buttons is pressed. If a 1 is ; written into bits 0-2, the corresponding switch is grounded and always reads as a 0. ; The XL series has no internal loudspeaker and thus the speaker output is routed to the TV instead. ; ; Bit 0 STA Loudspeaker 0 = Source, 1 = Sink ; Bit 1 SEL OPTION key 0 = Asserted (read) / Source (write), 1 = Inactive (read) / Sink (write) ; Bit 2 OPT SELECT key 0 = Asserted (read) / Source (write), 1 = Inactive (read) / Sink (write) ; Bit 3 SPK START key 0 = Asserted (read) / Source (write), 1 = Inactive (read) / Sink (write) ; .define CONSOL $D01f ; === POKEY === ; --------------------------------------------------------------------- ; AUDC1–4 ($D201, $D203, $D205, $D207) – Audio Control Registers ; ; These control: ; - Volume (0–15) ; - Distortion waveform ; - Optional noise (polynomial-based) ; ; Bit layout: ; 7 6 5 4 | 3 2 1 0 ; ----------------+----------------- ; - D2 D1 D0 | Volume (0–15) ; ; Where: ; - D2-D0 = Distortion type (also affects tone/noise behavior) ; - Volume = direct volume level (0 = silence, 15 = max) ; ; --------------------------------------------------------------------- ; Common Distortion Values (Bits 4–6): ; ; Value | Bits 6–4 | Description ; -------+----------+---------------------------------------------- ; $0x | 000 | Pure tone (useful for music/melody) ; $1x | 001 | Adds 5-bit polynomial noise ; $2x | 010 | Adds 4-bit poly; harsher noise ; $3x | 011 | 5-bit + 4-bit combined ; $4x | 100 | Tone with phase inversion (complex waveform) ; $Ax | 101–111 | Various "metallic" or percussive noise effects ; ; --------------------------------------------------------------------- .define AUDF1 $D200 .define AUDC1 $D201 .define AUDF2 $D202 .define AUDC2 $D203 .define AUDF3 $D204 .define AUDC3 $D205 .define AUDF4 $D206 .define AUDC4 $D207 ; --------------------------------------------------------------------- ; AUDCTL ($D208) – Global Audio Control Register for all 4 channels ; ; Bit | Value | Description ; ----+-------+--------------------------------------------------------- ; 7 | $80 | Use 17-bit polynomial counter for noise ; | (instead of 9-bit) ; ; 6 | $40 | Use 9-bit polynomial counter for noise ; | (instead of 5-bit) ; ; 5 | $20 | Use 1.79 MHz clock for channels 2 and 4 ; | (instead of default 64 kHz) ; ; 4 | $10 | Insert high-pass filter into channel 1 ; | (clocked by channel 2) ; ; 3 | $08 | Use channel 1 as noise clock source (instead of 4) ; ; 2 | $04 | Use 1.79 MHz clock for channels 1 and 3 ; | (instead of default 64 kHz) ; ; 1 | $02 | Join channels 3 + 4 into 16-bit frequency mode ; | (Channel 3 = output, AUDF3 = low byte, AUDF4 = high byte) ; ; 0 | $01 | Join channels 1 + 2 into 16-bit frequency mode ; | (Channel 1 = output, AUDF1 = low byte, AUDF2 = high byte) ; --------------------------------------------------------------------- .define AUDCTL $D208 .define STIMER $D209 .define SKREST $D20A .define POTGO $D20B .define KBCODE $D209 .define RANDOM $D20A .define SERIN $D20D .define SEROUT $D20E .define SKSTAT $D20F ;read .define SKCTL $D20F ;write ;+-----+---------+-----+--------------------------------------------------------------+ ;| Bit | Decimal | Hex | Function | ;+-----+---------+-----+--------------------------------------------------------------+ ;| 7 | 128 | $80 | The BREAK key is enabled. | ;| 6 | 64 | $40 | The keyboard interrupt is enabled. | ;| 5 | 32 | $20 | The "serial data input ready" interrupt is enabled. | ;| 4 | 16 | $10 | The "serial data output needed" interrupt is enabled. | ;| 3 | 8 | $08 | The "serial data output complete" interrupt is enabled. | ;| 2 | 4 | $04 | The interrupt of the fourth POKEY timer is enabled. | ;| | | | (POKEY Timer 4 is supported only by the XL and XE OS.) | ;| 1 | 2 | $02 | The interrupt of the second POKEY timer is enabled. | ;| 0 | 1 | $01 | The interrupt of the first POKEY timer is enabled. | ;+-----+---------+-----+--------------------------------------------------------------+ .define IRQEN $D20E .define IRQST $D20F ;? maybe wrong .define SKSTAT $D20F ; === Joystick / Input === ; PORTA ; ; Bit Function Joystick Port ; --- -------------- -------------- ; 0 Up Joystick 0 (Port 1) ; 1 Down Joystick 0 ; 2 Left Joystick 0 ; 3 Right Joystick 0 ; 4 Up Joystick 1 (Port 2) ; 5 Down Joystick 1 ; 6 Left Joystick 1 ; 7 Right Joystick 1 .define PORTA $D300 .define PORTB $D301 ;Atari 400/800 (not XL/XE) Joystick 2 and 3 ; ; Common ; ;Bit Description ;0 Controls OS ROM region. Disabling OS ROM enables RAM instead. 0 for disable, 1 for enable. ;1 Controls built-in BASIC. 0 for enable, 1 for disable. ;2 Controls LED #1 in the 1200XL. 0 for on, 1 for off. Extended RAM bank selection in the 130XE. ;3 Controls LED #2 in the 1200XL. 0 for on, 1 for off. Extended RAM bank selection in the 130XE. ;4 CPU extended RAM bit for 130XE only. 0 for enable, 1 for disable. ;5 ANTIC extended RAM bit for 130XE only. 0 for enable, 1 for disable. ;6 Missile Command enable bit for XEGS only, but only if BASIC is not enabled. 0 for enable, 1 for disable. ;7 Controls the self test ROM region. Disabling self test enables RAM instead. 0 for enable, 1 for disable. ; ; 1200XL (64 KByte) ; ; Bit Funnction Size ; 0 0 = $C000-$FFFF RAM 1 = $C000-$FFFF OS ROM 16k ; 1 ; 2 LED1 (1 on) ; 3 LED2 (1 on) ; 4 ; 5 ; 6 ; 7 0 = $5000-$57FF SETLFTEST ROM 1 = $5000-$57FF RAM 2k in 48k Space ; 64k = 48k + 16k ; ; ; 600XL/800XL (64 KByte) ; ; Bit Funnction Size ; 0 0 = $C000-$FFFF RAM 1 = $C000-$FFFF OS ROM 16k ; 1 0 = $A000-$BFFF BASIC ROM 1 = $A000-$BFFF RAM 8k (same memory?) ; 2 ; 3 ; 4 ; 5 ; 6 ; 7 0 = $5000-$57FF SETLFTEST ROM 1 = $5000-$57FF RAM 2k in 48k Space ; 64k = 48k + 16k ; ; 130XE/800XE (128 KByte) ; ; Bit Funnction Size ; 0 0 = $C000-$FFFF RAM 1 = $C000-$FFFF OS ROM 16k ; 1 0 = $A000-$BFFF BASIC ROM 1 = $A000-$BFFF RAM 8k ; 2 BA0 4 Banks $4000-$7FFF 64k (4*16k) ; 3 BA1 ; 4 0 = CPU access EXTRA RAM 1 = CPU access normal RAM ; 5 0 = ANTIC access EXTRA RAM 1 = ANTIC access normal RAM ; 6 ; 7 0 = $5000-$57FF SETLFTEST ROM 1 = $5000-$57FF RAM 2k ; 128k = 48k + 16k + 64k .define TRIG0 $D010 ;1 when Joystick 0 fire pressed .define TRIG1 $D011 ;1 when Joystick 1 fire pressed .define PTRIG0 $D014 ; === MMU / XL/XE-spezifisch === ;.define PORTB $D301 ; MMU at XE?? .define CONSOL $D01F ; console keys (SELECT/START/OPTION bit 0..2) ; OS related .define SETVBV $E45C .define SYSVBV $E45F .define XITVBV $E462 ;exit from the VBLANK routine .define XITVBL $E93E ;prolog of nmi ; ; GFX modes (check with emulator, internet say different things) ; ; +-------------+------------+-----------+----------------+--------------+----------------+----------------------------------------------------------------------------------+ ; | ANTIC Mode | GTIA Mode | Mode Type | Columns x Rows | # of Colours | Character Size | Notes | ; +-------------+------------+-----------+----------------+--------------+----------------+----------------------------------------------------------------------------------+ ; | 0 | 0 | | | 0 | | | ; | 2 | 0 | TEXT | 40 x 24 | 2 {1} | 8 x 8 px | color is inverted by map MSB | ; | 3 | 0 | TEXT | 40 x 19 | 2 {1} | 8 x 10 px {2} | color is inverted by map MSB | ; | 4 | 0 | TEXT | 40 x 24 | 4/5 | 4 x 8 px | color is selectable by map MSB (only on per tile) | ; | 5 | 0 | TEXT | 40 x 12 | 4/5 | 4 x 16 px | hight doubled, color is selectable by map MSB (only on per tile) | ; | 6 | 0 | TEXT | 20 x 24 | 4 | 4 x 8 px | 4 two color pixel per line (4rd color selectable by map MSB) | ; | 7 | 0 | TEXT | 20 x 12 | 4 | 4 x 16 px | hight doubled, 4 two color pixel per line (4rd color selectable by map MSB) | ; +-------------+------------+-----------+----------------+--------------+----------------+----------------------------------------------------------------------------------+ ; | 8 | 0 | GRAPH | 40 x 24 | 4 | ; | 9 | 0 | GRAPH | 80 x 48 | 2 | ; | A | 0 | GRAPH | 80 x 48 | 4 | ; | B | 0 | GRAPH | 160 x 96 | 2 | ; | C | 0 | GRAPH | 160 x 192 | 2 | ; | D | 0 | GRAPH | 160 x 96 | 4 | ; | E | 0 | GRAPH | 160 x 192 | 4 | ; | F | 0 | GRAPH | 320 x 192 | 2 {1} | ; | F | 1 | GRAPH | 80 x 192 | 16 {2} | GTIA ; | F | 2 | GRAPH | 80 x 192 | 9 | GTIA ; | F | 3 | GRAPH | 80 x 192 | 16 {3} | GTIA ; +-------------+------------+-----------+----------------+--------------+ ; ; vertical scanlines 0–261 (NTSC), 0–311 (PAL) ; typical visible vpos 40–232 (192) ; ; Scan line cycles ; ; Cyles per scanline (note: 3 Clk is is 1 Cycle) ; ; 0 10 20 30 40 50 60 70 ; ; |---------|---------|---------|---------|---------|---------|---------|------- ; ; ; There are 76 Cycles (228) Clocks per Scanline ; Visible Cycle 48-207 (160 Clocks) ; ; ;Cycle: 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 ... 60 .. 75 ; ;GTIA DMA: P1 P2 M - - - - - - - - - - - - - - - - - - ; ; | \_ Missiles (all 4 in 1 byte) ; | ; \______ Players 0–3 in 2 cycles (2 per byte) ; ; ; ;ANTIC DMA: - - - - - - - - - - - - - - - - DL DL GFX GFX GFX ; DLI trigger (+-) ; ; |--------- Graphics data fetch (screen or bitmap) ; ; ;Other: ←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←←→→→→→→→→ ; ; ; DLI Trigger (Zyklus ~65+) ; ; ; From Altirra ;+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+-------------------------------------------------------------------------+ ;| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | ;+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+------------------+ ;↓ ↓ ↓ ↓ ↓ ↓ ↓ ;VSCRL VSCRL/DLI check ↓ ↓ VBI/DLI triggered (2) Normal PF start Narrow PF start (1) ;set ↓ Wide PF start (1) ;start ↓ ;DL DMA DLI/BVI set in NMIST ;enable ; ; ;(--- Zycle 26 to 87 skipped ---) ; ;+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+-------------------------------------------------------------------------+ ;| 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 | 96 | 97 | 98 | 99 |100 |101 |102 |103 |104 |105 |106 |107 |108 |109 |110 |111 |112 |113 | ;+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+------------------+ ; ↓ ↓ ↓ ↓ ↓ ↓ ↓ ; Narrow PF stop (1) Normal PF stop (1) ↓ ↓ ↓ ↓ VCOUNT rollover ; ↓ WSYNC end ↓ VCOUNT increments ; ↓ Wide PF stop (1) VSCROL end check ; WSYNC deadline (3) ; ; ; The above figure shows the timing of various events within ANTIC and the available cycle times at which the CPU can read or write values in response. ; These are marked on machine cycle boundaries, so only writes before the boundary will affect the event and only reads after the boundary will reflect it. ; For instance, the narrow width playfield start boundary is between cycles 24 and 25, so a write to DMACTL to turn on the narrow playfield must occur on ; cycle 24 or earlier. Similarly, the VCOUNT increment on a scan line will only be reflected in reads on cycle 100 or later. ; (1) PF start/stop events are delayed by one cycle for every two increase in HSCROL when horizontal scrolling. ; (2) 7-cycle NMI sequence normally starts at first instruction boundary on cycle 10 or later, unless overlapping an earlier IRQ. ; (3) If read/modify/write instruction on 6502 or 65C816 (emulation mode), both write cycles must occur before this deadline ; ; GTIA color priority encoding ; ; 1. Player 0–3 (GTIA PMG) ; 2. Missiles ; 3. Playfield (ANTIC Grafikdaten – COLPF0–3) ; 4. COLBK ; ; encoding by mode ; ; +------------+-----------+------------------------+-------------------------------+-----------+ ; | Mode | ANTIC | Color Registers Used | Bit Pattern Mapping | Colors | ; +------------+-----------+------------------------+-------------------------------+-----------+ ; | GR. 0 | Mode 2 | COLBK, COLPF0–2 | 00 = COLBK | 4 colors | ; | (Text) | | | 01 = COLPF0 | (2 bits) | ; | | | | 10 = COLPF1 | | ; | | | | 11 = COLPF2 | | ; +------------+-----------+------------------------+-------------------------------+-----------+ ; | GR. 2 | Mode 6 | COLBK, COLPF0–2 | Same as above | 4 colors | ; | (Hi-Res) | | | | | ; +------------+-----------+------------------------+-------------------------------+-----------+ ; | GR. 3 | Mode 4 | COLBK, COLPF0 | 1 bit → 0 = COLBK, 1 = COLPF0 | 2 colors | ; +------------+-----------+------------------------+-------------------------------+-----------+ ; | GR. 5 | Mode E | COLBK, COLPF0–3 | 2-bit "color cells" | 5 colors* | ; | | | | 00 = COLBK | | ; +------------+-----------+------------------------+-------------------------------+-----------+ ; | GR. 7 | Mode F | COLPF0 only | 1 bit → all pixels = COLPF0 | 1 color | ; +------------+-----------+------------------------+-------------------------------+-----------+ ; | GR. 8 | Mode B | COLBK, COLPF1 | 1 bit → 0 = COLBK, 1 = COLPF1 | 2 colors | ; +------------+-----------+------------------------+-------------------------------+-----------+ ; | GTIA 9 | Mode 9 | COLPF0 only | 4-bit luminance | 9 shades | ; | (Luma) | | | Hue fixed | | ; +------------+-----------+------------------------+-------------------------------+-----------+ ; | GTIA A | Mode A | GTIA grayscales | 4-bit → 16 grayscale levels | 16 shades | ; +------------+-----------+------------------------+-------------------------------+-----------+ ; | GTIA B | Mode B | COLPF1 (hue), GTIA | 4-bit → 16 color hues | 16 colors | ; +------------+-----------+------------------------+-------------------------------+-----------+ ; ; * GR.5: COLPF3 can be overridden by PMG depending on PRIOR settings, so only 4 colors may be visible ; ;DLI related defines ; ; 7 6 5 4 3 2 1 0 ; DLI LMS VSCROLL HSCOLL Mode ; ; Mode 0 Blank lines 7..4 is count+1 of blank lines ; Mode 1 JMP (use with LMS to set destination) ; Mode $2-$f is ANTIC mode .define DL_DLI $80 .define DL_LMS $40 .define DL_VSCROLL $20 .define DL_HSCROLL $10 .define DL_JUMPVB $41 .define DL_JUMP $01 .define DL_BLANK $00 .endif