FPGA / Altera DE2-115

Goldmomo Endlos

Finished sometime or never. Goldmomo Endlos is an archived FPGA console experiment with a self-written utility CPU, board controller, emulator, tools, demos and VHDL sources.

Back to Home DocsOpen Build Archive ZIPDownload All-in-one ZIP

Archive note: Archived project, kept for historical interest.

FPGA note: This project belongs to my early FPGA learning phase. Looking back, many parts of the code could be written much simpler, cleaner and more optimal today. It stays here as an archive of that learning process.

Showcase

Videos

The original page had a long horizontal YouTube showcase. The videos are preserved here and load only after you click play.

Beim Abspielen wird YouTube/Google geladen.

Goldmomo Endlos Demo 01
Goldmomo Endlos Demo 02
Video and board test
Hardware showcase
Tools and emulator
Audio and graphics
Demo clip
Demo clip
Demo clip
Demo clip
Demo clip
Demo clip
Demo clip
Demo clip
Demo clip
Demo clip
Demo clip
Demo clip
Demo clip
Demo clip
Demo clip
Hardware

System Design

Supported System

  • Altera DE2-115 board

UCore

Self-written utility core.

  • 16-bit ALU for arithmetic, logic, bit fields and IO
  • 32-bit external address IO
  • 8 registers
  • 6-stage pipeline; normal instructions can run without stalls
  • 106.48 MHz clock speed, over 100 MIPS throughput
  • Graphics acceleration extension

UCtrl

  • Programmable framebuffer up to 1440 x 900 pixels
  • Audio input/output up to 96 kHz at 24 bit
  • Board IO: LEDs, HEX, keys, LCD, PS/2, SD card
  • Queue-based multiport bus for SDRAM, SRAM and flash
  • SD card access up to 100 MBit

HCores

Experimental self-written special multi-core design, not finished or released.

  • 8 or more cores in the target configuration
  • 32-bit integer ALU
  • Fully pipelined 32-bit floating point ALU
  • 256 general purpose registers per core, shared for int/float
  • Instruction and data cache experiments
  • Async paths for memory, UCore communication and pixel pipeline work
Software

Tools and Demos

Assembler Files

Games and test programs for board IO, audio, graphics, booting and system experiments.

SourceOpen assembler files

To Do

Finish the HCore design and write demo applications for the HCore system.

File Resources

Downloads

Daily Build Archive

Documentation, cross assembler, emulator, graphics converter, example packages, UCore source code and VHDL source of the complete system.

DocsOpen build archive

All-in-one ZIP

Combined package with software and resources.

ZIPDownload ZIP